This chapter is optional. In The switch, a voltage on the gate pulled electrons into a thin bridge. This chapter asks why that works at all. The answer is hidden inside silicon itself.
Silicon is a . Metal carries electricity easily, and glass hardly carries it at all. Silicon sits in between, and we can change how much it carries on purpose. That is what makes it so good for switches.
Some of this was found by accident. In 1940, Russell Ohl at Bell Labs saw a slab of silicon make electricity when light hit it. Two parts of the slab held different traces of other elements, and the border between them did the trick.14
This chapter is optional. It explains the physics behind the switch chapter’s claim that a gate voltage “forms a channel.” You can use transistors without it, but it is where threshold voltage, leakage and many of the trade-offs in later chapters come from.
The chapter builds up in four steps:
- Bands. Why silicon is a rather than a metal or an insulator, in terms of the energies its electrons are allowed to have.
- Doping. How adding about one foreign atom per million silicon atoms gives silicon extra free electrons or extra holes.
- The p-n junction. What happens where the two kinds of silicon meet, and why it conducts one way only. Every transistor’s source and drain is one.
- The MOS capacitor. How a gate voltage turns the surface of p-type silicon into a thin n-type layer, and the voltage at which that happens: the threshold voltage.
The idea of controlling a semiconductor with a nearby electrode is old. Julius Lilienfeld patented a field-effect transistor in 1930 and Oskar Heil described a recognizably modern one in 1935,5 but it took many more innovations to make one that worked. The missing piece was a clean interface between silicon and its oxide. In 1959 Mohamed Atalla and Dawon Kahng at Bell Labs found that thermally grown silicon dioxide greatly reduced the electrical defects at the silicon surface, and built the first successful metal-oxide-semiconductor transistor.15
This chapter is optional. You know a MOSFET as a switch with a threshold voltage. Here we derive that threshold from the electrostatics of the gate stack:
and show what sets each term: gate work function and oxide charge, body doping through the Fermi level, and the depletion charge the gate has to support. Along the way we need carrier statistics (how doping positions the Fermi level), the p-n junction (which isolates every source and drain), and the MOS capacitor from accumulation to inversion.4
The treatment is the classic long-channel one. It is the reference the I-V curve and Shrinking chapters correct for short channels, quantum confinement and multi-gate geometries. Three numbers to carry through: silicon’s band gap of 1.12 eV, an intrinsic carrier density of about , and the thermal voltage at 300 K.1
Step 1, bands: the energies silicon’s electrons may have, and the gap between them, make it a semiconductor.
Electrons in silicon can only have certain amounts of energy. These form two bands, like the two floors of the garage.1
The lower band is full. Its electrons are the glue that holds the atoms together, so none can move. The upper band is almost empty. An electron that gets up there is free to roam.
Between them is the : a jump an electron must make in one go to get free. In a metal there is no jump to make, so metals always carry electricity. In glass the jump is so big that almost no electron makes it. Silicon’s jump is in between.1
Heat makes atoms jiggle, and that knocks a few electrons across. Each one leaves an empty spot behind, called a . A neighbor can hop into it, so the hole moves around like a bubble in water. But only about one atom in five trillion loses an electron this way. So pure silicon barely carries electricity.112
Each silicon atom shares its four outer electrons with four neighbors, forming covalent bonds; in the crystal every atom has exactly four nearest neighbors.1 Quantum mechanics says the electrons in such a crystal can only have energies inside certain bands. Two of them decide how silicon conducts:
- The , filled by the bonding electrons. Its top edge is written .
- The , nearly empty. Its bottom edge is .
The gap between them, the , is 1.12 eV for silicon. (An electron-volt, eV, is the energy an electron gains crossing one volt.) Other semiconductors span a wide range: germanium 0.67 eV, gallium arsenide 1.42 eV, diamond 6.0 eV.1
A completely full band and a completely empty band both carry no current, just as nothing flows in a full or an empty jar. A metal has a partly filled band, which is why it conducts so well. An insulator has the same layout as a semiconductor with a much bigger gap.1
When an electron is lifted into the conduction band it leaves a vacancy in the valence band. That vacancy, a , behaves like a particle with positive charge. Holes carry current just as electrons do, but in silicon they are slower: the mobility (drift speed per unit electric field) is about 1,400 cm²/V·s for electrons and 470 cm²/V·s for holes.2 That asymmetry comes back in CMOS logic, where PMOS transistors, which conduct with holes, are made wider.
How many carriers, and the Fermi level
Thermal energy at room temperature, written , is about 0.026 eV, more than forty times smaller than silicon’s gap. So heat lifts very few electrons across. In pure (intrinsic) silicon the is about electrons per cm³, with an equal number of holes.1 A cubic centimeter of silicon holds atoms,12 so only one atom in about five trillion has contributed a free electron.
To describe which states are filled, physicists use the : the energy at which a state has a 50% chance of being occupied. The occupancy falls off exponentially above it and approaches 100% below it, over a range of a few .1 In intrinsic silicon sits very close to the middle of the gap. The sections below are mostly about moving it.
The occupancy of a state at energy is the Fermi function
More than a few above it reduces to a Boltzmann exponential, and integrating it against the density of states gives the carrier densities in compact form:1
- with effective densities of states and for silicon at 300 K.
- Multiplying them removes :This mass-action law holds at equilibrium whether or not dopants are present.
- The intrinsic level , where , sits at midgap plus , about 13 meV below midgap in silicon. Most hand analysis, and this chapter’s simulation, treats it as midgap.
Hu uses ;1 the modern measured value at 300 K is .9 The difference shifts a built-in potential by only about 2 mV, but the temperature dependence is large: , so it roughly doubles every 9 °C near room temperature (from the formula with ). Anything proportional to , such as junction leakage, quadruples over the same step.
Two details matter later. First, silicon’s gap is indirect, so it absorbs and emits light poorly compared with direct-gap materials like GaAs.3 Second, hole mobility is about a third of electron mobility (470 vs 1,400 cm²/V·s in lightly doped silicon), partly because of the larger hole effective mass.2 Both are bulk numbers; in a MOSFET’s inversion layer the mobilities are lower, because of surface-roughness scattering.5
Silicon at 300 K: n_i ≈ 1.0×10¹⁰ per cm³, one atom in 5 trillion.
Pure silicon has far too few free electrons to be useful. fixes that: you swap a few silicon atoms for atoms of another element.10
Phosphorus brings a spare electron, so its silicon is , for negative. Boron is one electron short, which leaves a hole. Its silicon is , for positive.
The amounts are tiny: about one added atom for every million silicon atoms. That’s like one person in a big city. Yet it gives the silicon millions of times more free electrons or holes.112
replaces a small fraction of silicon atoms with atoms from a neighboring column of the periodic table.10
- Donors are group V elements (phosphorus, arsenic, antimony) with five outer electrons. The fifth electron is bound so weakly, 39–54 meV depending on the element,1 that room-temperature heat () frees nearly all of them. The result is silicon.
- Acceptors are group III elements, almost always boron (45 meV), which complete their bonds by taking an electron from the valence band, creating a hole. The result is silicon.1
In n-type silicon electrons are the and holes the minority; in p-type it is the reverse.10 The two are linked by a simple rule: at equilibrium their product is fixed at .1 A worked example:
| Quantity | Pure silicon | Doped with phosphorus atoms per cm³ |
|---|---|---|
| Free electrons () | per cm³ | per cm³ (one per donor) |
| Holes () | per cm³ | per cm³ |
| Dopant share of atoms | 0 | = 1 in 500,000 |
| Fermi level | Mid-gap | About 0.15 eV below |
The Fermi level figure is from Hu’s worked example;1 the atom density is from the Ioffe data tables.12 Doping 10 million times more electrons into the silicon pushes the holes down 10 million times: the extra electrons fill most of them.
Doping also has a cost. The ionized dopant atoms are charged obstacles that scatter carriers, so mobility falls as doping rises.2 And doping is done locally, region by region: a fab implants dopant ions into the areas left open by a patterned mask, then heats (anneals) the wafer to move them into the crystal lattice and repair the damage.5 The Making them chapter covers how.
With full ionization, charge neutrality is . Combined with it gives the exact majority density
which reduces to whenever the net doping is well above . Counter-doping (compensation) is routine: wells, threshold-adjust implants and halos are all layered on top of each other, and only the net doping sets the carriers, while the total doping sets impurity scattering.12
The Fermi level follows from the Boltzmann form: for n-type, and for p-type. Each decade of doping moves by . That logarithm is why doping is such a gentle knob on band positions and such a strong knob on carrier densities.
Where the simple model stops:
- Degenerate doping. The Boltzmann form is only valid when is more than a few inside the gap.1 Since , donor levels of around and above, typical of source/drain regions, put at or into the band. Full Fermi-Dirac statistics, incomplete ionization and band-gap narrowing then matter. The simulation stops at to stay inside the simple model.
- Temperature extremes. At cryogenic temperatures dopants freeze out ( falls below ); at high temperatures catches up with the doping and the material turns effectively intrinsic.1
In a real process, doping is the main knob for threshold flavors. SKY130’s low- and high- 1.8 V transistors have cross-sections identical to the standard devices except for the -adjust implants.13
Each silicon atom shares its four outer electrons with its four neighbors in covalent bonds. Pick a dopant.
Now put n-type silicon right next to p-type silicon. The border between them is a . In a chip, both sides are parts of one crystal, just doped differently.
Free electrons and holes wander across the border and cancel each other out. That leaves a thin empty zone. The added atoms stay behind in it, now charged, and they push back like a hill. So the mixing stops.11
Now push with a voltage, an electric push like a battery’s. Push one way and the hill shrinks. Electricity flows easily once the push reaches about 0.6 volts. Push the other way and the hill grows, so only a tiny trickle gets through.3
So a junction is a one-way door for electricity, called a diode. LEDs and solar cells are junctions too. In a transistor, these one-way doors keep the source and drain sealed off from each other, until the gate opens a path.
Where p-type and n-type regions meet, electrons diffuse from the n side into the p side and holes diffuse the other way. They leave behind uncovered ionized dopants, positive donors on the n side and negative acceptors on the p side, and the field between these fixed charges pushes back. Equilibrium arrives when the field’s pull (drift) exactly balances the diffusion.117
Three results describe the junction:
- A depletion region forms around the junction, nearly empty of mobile carriers. It reaches mostly into the more lightly doped side, because that side must deplete a wider slab to uncover the same total charge. At on the light side it is about 0.1 µm wide.3
- A , roughly 0.6–1 V in silicon depending on doping, appears across it. In a band diagram the bands bend by that amount across the depletion region while the Fermi level stays flat: at equilibrium there is no net current anywhere.3
- Rectification. A forward bias lowers the barrier by , and current rises exponentially, about tenfold per 60 mV at room temperature. That is why silicon diodes seem to “turn on” around 0.6 V. A reverse bias raises the barrier by and widens the depletion region; the current is a tiny, nearly constant leakage, until the field gets strong enough for breakdown.3
The depletion region acts like the insulator in a capacitor, with the neutral regions on each side as the plates. This junction capacitance shrinks as reverse bias widens the depletion region. It loads every transistor’s source and drain and slows circuits down, which is why it is kept small by limiting junction area and doping.3 You’ll meet it again in Speed and power.
Under the depletion approximation (neutral regions perfectly neutral, depletion region fully depleted, sharp edges at and ), Poisson’s equation integrates to a triangular field and two parabolic potential segments.7 The results, for a junction with applied forward bias :3
- with from charge balance
- Peak field at the metallurgical junction
- Junction capacitance per area
For the simulation’s junction (, , ): , at zero bias with 91% of it (0.302 µm) on the n side. At 3 V reverse, and .
Under bias the single Fermi level splits into quasi-Fermi levels and , separated by and flat across the depletion region. That gives the boundary condition for injected minority carriers, which then diffuse and recombine over a diffusion length . Summing both sides gives the ideal diode law3
Three consequences worth keeping:
- Injection goes mostly into the lighter-doped side; in a one-sided junction one term of dominates.
- , so reverse leakage climbs steeply with temperature. Drain-to-body junction leakage is one of a MOSFET’s three off-state leakage paths, along with subthreshold conduction and gate tunneling.6
- The built-in potential can’t be measured at the terminals. The metal-semiconductor contacts carry their own contact potentials that cancel it, so a shorted diode at equilibrium carries no current.7
Breakdown sets the reverse limit: avalanche multiplication when the peak field reaches a critical value, or band-to-band tunneling in heavily doped junctions, which is the basis of Zener diodes.3
p-type silicon, with holes as majority carriers, and n-type, with electrons. Each is neutral on its own.
Now for the transistor’s key piece. Start with p-type silicon. Cover it with a very thin layer of glass, then put a plate that carries electricity on top. That plate is the gate. Watch what the gate’s voltage does to the silicon just under the glass.4
A small push on the gate shoves the holes away. A bigger one pulls in a thin sheet of electrons. The surface has flipped to n-type, so the sheet is called an .
That sheet of electrons is the bridge from The switch. It joins the source to the drain. The gate voltage where it appears is the .
Engineers pick the threshold on purpose. Too high, and the transistor needs a big push to turn on. Too low, and it never quite turns off. For a transistor that runs on 1.8 volts, about half a volt is common.13
A is a gate electrode on a thin insulator (originally silicon dioxide) on a doped silicon body. For an NMOS device the body is p-type. As the gate voltage rises, the silicon surface passes through three regimes separated by two landmarks:4
| Gate voltage | Surface | Bands at the surface |
|---|---|---|
| Below | Accumulation: extra holes piled at the surface | Bend up |
| At | : no charge in the silicon | Flat |
| Between and | Depletion: holes pushed away, fixed acceptors uncovered | Bend down |
| At | Threshold: surface electron density equals the bulk hole density | Bent down by |
| Above | Inversion: a sheet of electrons at the surface | Bend barely more |
The threshold definition, surface electron density equal to the body doping, means the conduction band at the surface has come as close to the Fermi level as the valence band is in the bulk. The band bending needed is twice , the distance (in volts) between the Fermi level and mid-gap in the body.48
Past threshold something important happens. The surface electron density depends exponentially on the band bending, so a tiny extra bend supplies a lot of electrons. The depletion region stops growing, and each additional volt on the gate goes into inversion charge. The gate and the channel behave like the two plates of a capacitor: , where is the oxide capacitance per area.8 This is only 1–2 nm thick.5
What sets the threshold voltage
The is the sum of three pieces: the gate voltage to reach flat band, the band bending , and the voltage dropped across the oxide to hold the depletion charge. So:8
- Body doping: more doping raises , because there is more charge to uncover.
- Oxide thickness: a thinner oxide (bigger ) lowers , because less voltage is dropped across it.
- Gate material: its shifts . A p-type body is paired with an gate to get a small positive ; an n-type body (PMOS) with a gate to get a small negative one.4
- Body voltage: raising the source above the body (reverse-biasing that junction) raises . This is the , and it matters in stacked transistors.5
For scale: the SKY130 open process’s standard 1.8 V NMOS has in the typical corner, and its low- version, made with a different threshold-adjust implant, 0.434 V.13
Take a p-type body with doping , oxide capacitance and surface potential (band bending, positive downward). Kirchhoff around the gate stack and Gauss at the interface give4
where is all the charge in the silicon per unit area. The threshold computation then goes in three steps:8
- Band bending at threshold. With , setting the surface electron density to gives , where .
- Depletion charge. The depletion width at that bending is , holding . Electrons are still negligible.
- Sum the drops.
The flat-band voltage is the work-function difference less any oxide charge, . For an polysilicon gate equals silicon’s electron affinity, 4.05 V, and , so in the body.412
A worked case (the simulation’s default): , , at midgap.
| Term | Expression | Value |
|---|---|---|
| 0.863 µF/cm² | ||
| 0.476 V | ||
| −1.036 V | ||
| 0.952 V | ||
| 0.651 V | ||
| sum | 0.568 V | |
| 35 nm |
Above threshold the depletion charge is pinned near its threshold value, so the charge-control relation follows.8 Two refinements apply to real devices:
- Body effect. A source-to-body reverse bias adds depletion charge coupled through , giving with (3 being roughly 11.7/3.9, the ratio of dielectric constants). Steep retrograde doping, a light surface layer over a heavy one, pins and reduces .5
- Electrical oxide thickness. Gate depletion in a poly gate and the finite inversion-layer thickness each add about a third of their thickness: . Metal gates remove the first term; the second remains.46
The definition is a textbook landmark, not what a datasheet reports. In practice is usually extracted as the gate voltage where the drain current reaches a fixed value such as .6
Flat band (V_fb = −1.04 V for an n+ gate on this body): no charge in the silicon, every acceptor matched by its hole.
V_T = 0.57 V. Depletion term 0.65 V: it grows with doping and with oxide thickness.
The simulation draws the two energy bands with the gap between them. Filled dots are free electrons. Open dots are holes.
In Doped silicon, drag the slider left to add boron-like atoms, or right to add phosphorus-like atoms. Watch the dots change. The dashed orange fill line shows how full the bands are. It rises as you add free electrons and drops as you add holes.
In p-n junction, drag the push slider. Watch the hill between the two sides shrink or grow, and the empty zone with it.
The simulation draws band diagrams in three modes. Filled dots are electrons, open dots holes, and each dot stands for a factor of ten in concentration, so the pictures stay readable over 16 orders of magnitude. Things to try:
- Doping: move from intrinsic to donors and check that holes drop to per cm³ as electrons rise. Then go to the p side and watch the Fermi level cross mid-gap.
- p-n junction: sweep from −3 V to +0.7 V. The depletion width shrinks from about 0.73 µm to 0.10 µm, and the current readout rises about tenfold every 60 mV once you’re forward.
- MOS capacitor: sweep the gate from −2 V to +2.5 V and watch the surface go from accumulation through depletion to inversion. The lower plot shows electrons at the surface (log scale) with the threshold marked. Then raise the body doping or thicken the oxide and see the threshold move.
Everything is analytic: Boltzmann statistics, full ionization, at midgap, , 11.7 (Si) and 3.9 (), 300 K. The junction uses the depletion approximation with and . The MOS mode solves the exact one-dimensional charge equation for (see Under the hood), so it is not built on the threshold formula it reports. Experiments:
- Compare the solved inversion charge with . At the default and the model gives against from the formula: keeps rising past by several , which the formula ignores.
- On the log plot, the slope below is the subthreshold behavior: surface electron density rises by a decade per , where . Thin the oxide and watch it steepen.
- Drop the body doping to with a thin oxide: goes negative. An gate on a lightly doped p body makes a depletion-mode (normally on) device, which is why the doping and the gate work function have to be chosen together.
- In the junction mode, check that the depletion width scales as and that stays at .
- Silicon band gap
- 1.12 eV
- Free carriers in pure Si (300 K)
- ~10¹⁰ /cm³
- Silicon atoms
- 5 × 10²² /cm³
- SKY130 1.8 V NMOS threshold
- 0.538 V
These numbers come from a chip textbook,1 a table of silicon facts12 and a real chipmaker’s recipe.13 What they mean:
- The band gap is 1.12 eV. An eV (electron-volt) is the energy one electron gets from a push of one volt.
- Pure silicon barely carries electricity. A sugar-cube-sized piece has about 50,000 billion billion atoms, but only about 10 billion free electrons. That’s one in five trillion.
- A pinch of doping changes everything. Swap one atom in a million and you get millions of times more free electrons.
- The hill at a junction is less than a volt. That’s why a silicon diode needs a push of about 0.6 volts before electricity really flows.3
- A real transistor turns on at about half a volt. Engineers chose that by adjusting the doping under the gate.
| Quantity | Value | Why it matters |
|---|---|---|
| Band gap: Ge / Si / GaAs / diamond | 0.67 / 1.12 / 1.42 / 6.0 eV | Sets intrinsic carriers and leakage1 |
| Intrinsic carrier density, Si, 300 K | ( measured) | Reference point for every doping calculation9 |
| Dopant binding energy: P / As / B | 44 / 54 / 45 meV | About or less, so nearly all are ionized at room temperature1 |
| Mobility in Si: electrons / holes | 1,400 / 470 cm²/V·s | PMOS needs more width for the same current2 |
| Depletion width at | ≈0.1 µm | Sets junction capacitance3 |
| Diode current vs forward voltage | ×10 per 60 mV | The same exponential governs subthreshold leakage3 |
| SKY130 1.8 V NMOS : standard / low- | 0.538 / 0.434 V | Two flavors from one structure, by implant13 |
The SKY130 documentation compares its model against e-test specs. For the 1.8 V NMOS (W/L = 7/8 µm) the extracted threshold is 0.538 V typical, 0.520 V fast and 0.557 V slow; the low- device is 0.434 V typical. The two share a cross-section and differ only in the -adjust implant.13 The spread between corners (about ±20–25 mV) is smaller than the 100 mV gap between flavors, which is what makes multi- libraries useful.
Computed with the simulation’s model (illustrative, uniform doping, 300 K):
| Case | Result |
|---|---|
| for / / | 0.357 / 0.417 / 0.476 eV |
| Junction , : | 0.774 V |
| Same junction: at −3 / 0 / +0.6 / +0.7 V | 0.733 / 0.332 / 0.157 / 0.102 µm |
| Same junction: at +0.6 / +0.7 V | / |
| MOS , : 1.5 / 4 / 8 nm | −0.07 / 0.05 / 0.24 V |
| MOS , : 1.5 / 4 / 8 nm | 0.16 / 0.57 / 1.22 V |
| MOS at (, 4 nm): |
Note the sensitivity: at the depletion term is the biggest lever on , and it scales linearly with . That is why oxide-thickness control is a threshold-control problem as much as a capacitance one.
Low or high threshold? A low threshold turns on with a smaller push, so the transistor can be faster. But it never fully shuts off, so it leaks power all the time. A high threshold leaks less but is slower. Chip designers get several kinds and mix them.13
Thin or thick glass? Thinner glass gives the gate a stronger grip. But once it’s only a few atoms thick, electrons start to slip straight through it.6
Too few atoms to count on. In the tiniest transistors, the silicon under the gate holds only a few dozen added atoms. The exact number changes by chance from one transistor to the next. So transistors that should be twins aren’t quite the same.6 Newer transistor shapes avoid relying on that doping.
- Threshold: speed against leakage. A lower gives more drive current at a given supply, but below threshold the current doesn’t drop to zero; it falls by about a factor of ten for every 60–100 mV, so a lower means exponentially more off-state leakage.6 Processes therefore offer several flavors from the same structure, made with different implants.13 See Speed and power.
- Doping: control against mobility and capacitance. Heavier body doping keeps depletion regions thin, which helps the gate keep control of a short channel, but it raises , lowers mobility through impurity scattering, and increases junction capacitance.23
- Oxide: control against tunneling. A thinner oxide raises , which lowers , strengthens the gate and shrinks the body effect, but below about 1.5 nm electrons tunnel straight through: 1.2 nm of leaks about 1,000 A per cm². High-k dielectrics such as give the same capacitance with a physically thicker film.6
- Variation. Random dopant fluctuation, the chance variation in how many dopant atoms sit under each small gate, causes significant threshold differences between nominally identical transistors.6
- Temperature. Heat raises steeply, which raises junction leakage. Since shrinks as grows, also falls as a chip heats up, adding more subthreshold leakage on top.1
- Choosing . Subthreshold current goes as with swing at 300 K, set by (and interface states). Every 100 mV of reduction at costs a decade of . Lowering , by a thinner oxide or a wider depletion layer, is the preferred way to get both a low and a low .6
- Doping profile. A uniform body forces a trade between (short-channel control wants it small) and , mobility and body effect (which want light doping at the surface). Steep retrograde profiles, a light surface layer over a heavily doped one, decouple them: the depletion layer is basically the thickness of the light layer.5
- Random dopant fluctuation, back of the envelope. At , . Under a 30 nm × 30 nm gate that volume holds acceptors. Poisson statistics give , an 18% spread in . With , that is on the order of 0.1 V of spread (an overestimate, since dopants deep in the depletion region count less, but the scale is right). The general point: from RDF grows as gate area shrinks.6
- Undoped channels and work-function . FinFETs were conceived with undoped channels, relying on fin dimensions for gate control, which removes RDF. The cost is that must come from the gate work function, which adds process complexity. Light channel doping is an option, at some cost in mobility and RDF: in IBM and GlobalFoundries test wafers at about a third of measured variability came from RDF, the rest from fin height, gate length and work-function variation.16 Metal gates for NMOS and PMOS generally need different metals with work functions near those of and poly.6
- Oxide scaling. tunneling leakage rises exponentially as it thins ( at 1.2 nm). with an equivalent oxide thickness of 1 nm leaks orders of magnitude less, at the price of chemical reactions with the silicon, lower mobility and more oxide charge, which is why a thin interlayer remains under the high-k film.6
28 acceptors (average 32, −11%). 1 built; chance alone predicts a spread of about ±18%.
This part goes deeper, into the math, models and algorithms behind the chapter. It’s written for the Expert level.
Equilibrium as drift balancing diffusion
Every band diagram in this chapter rests on one statement: at equilibrium the electron and hole currents vanish separately, so in every region drift exactly cancels diffusion.7 With the Einstein relation, that forces the Boltzmann relations
with measured from the intrinsic level, and everywhere. Under bias, as long as the oxide or the depletion region keeps current small, the same relations hold in quasi-equilibrium.8 The remaining equation is Poisson’s, .
The depletion approximation and its limits
Substituting the Boltzmann densities into Poisson gives a nonlinear equation. The depletion approximation replaces it with a box: or inside the depletion region and zero outside, with sharp edges. The field is then piecewise linear, the potential piecewise parabolic, and charge neutrality plus continuity of fix and .7 The edges are really smeared over a few Debye lengths, , about 4 nm at and 40 nm at (from the formula). The approximation is good when , which fails near flat band and in weak accumulation; that is exactly where the exact solution below is needed.
The exact MOS charge equation (what the simulation solves)
For a uniformly doped p-type body, multiply Poisson by and integrate once from the bulk (, ) to the surface. With this gives the surface field, and by Gauss’s law the total silicon charge:
The first bracket is the hole and ionized-acceptor contribution and the second is electrons. Each regime appears as one term dominating:
- Accumulation (): dominates and the hole charge grows as , so barely moves past a few negative.
- Depletion: dominates, recovering , the depletion result.
- Inversion: the electron term catches up when , near , and then grows as . That exponential is why pins a few above and why the depletion width saturates.
φ_s = 0.500 V → |Q_s|/q = 2.5e12 cm⁻², electrons negligible, V_g = −0.08 V. Depletion: βφ dominates, |Q| = √(2qN_aε_sφ_s).
Since is monotonic in , the simulation finds for each gate voltage by bisection over −0.8 to 1.6 V (60 halvings, far below a microvolt). The inversion charge is the difference between with and without the electron term. Nothing in that loop uses the threshold formula; is drawn on the plot only as the textbook landmark to compare against.
Below threshold
In weak inversion the electron sheet density is proportional to , while follows through a capacitive divider: . So the current falls a decade for every of gate voltage, with , larger when interface states add their own capacitance in parallel with .6 The same 60 mV is the diode’s per-decade figure: both are , the Boltzmann factor showing through. No conventional MOSFET at room temperature can switch more steeply than that.
How the parameters are measured
The MOS capacitor is also the main measurement structure. Its capacitance–voltage (C–V) curve, measured by adding a small AC signal to a DC gate sweep, is the usual way to determine oxide thickness, substrate doping, flat-band voltage and threshold voltage. In accumulation the structure is just ; in depletion it is in series with the depletion capacitance, falling as grows. In inversion a slow (quasi-static) sweep returns to , while a high-frequency curve stays low because the inversion charge can’t follow the AC signal. A MOSFET’s source and drain junctions supply that charge quickly, which is why a transistor’s gate C–V follows the quasi-static curve at all frequencies.4
Assumptions the simulation makes
- Boltzmann statistics and full ionization, so doping is capped at .1
- at midgap; ; .
- Uniform doping, one dimension, no oxide or interface charge, an ideal gate with no depletion.
- No quantum confinement: a real inversion layer’s electrons sit effectively 1.5–3 nm below the interface, which adds to the electrical oxide thickness.4
- The junction’s quasi-Fermi levels are drawn flat on each side; diffusion and recombination of the injected carriers are only indicated by dots.
Q1Silicon is doped with donors per cm³ and is about per cm³. Roughly how many holes per cm³ are there?
Q2A junction has p-side doping and n-side doping per cm³. Where is the depletion region?
Q3What happens to an NMOS threshold voltage if the p-type body is doped more heavily?
Q4Once a MOS capacitor is past threshold, where does extra gate voltage mostly go?
Sources
Show Hide 16 sources
- Chapter 1: Electrons and Holes in Semiconductors, Modern Semiconductor Devices for Integrated CircuitsBond and band models, Eg = 1.12 eV for Si and other band gaps, donors and acceptors with ionization energies, Fermi function, Nc and Nv, ni ≈ 10¹⁰ cm⁻³, np = ni², Fermi level vs doping.
- Chapter 2: Motion and Recombination of Electrons and Holes, Modern Semiconductor Devices for Integrated CircuitsMobility values (Si: 1400 cm²/V·s for electrons, 470 for holes) and impurity scattering, which lowers mobility as doping rises.
- Chapter 4: PN and Metal–Semiconductor Junctions, Modern Semiconductor Devices for Integrated CircuitsBuilt-in potential, depletion width (≈0.1 µm at 10¹⁷ cm⁻³), one-sided junctions, reverse bias, junction capacitance, the diode equation, 60 mV per decade, the ~0.6 V turn-on of Si diodes, breakdown.
- Chapter 5: MOS Capacitor, Modern Semiconductor Devices for Integrated CircuitsFlat band, accumulation, depletion, threshold (ns = Na, φs = 2φB) and inversion; Vfb = ψg − ψs − Qox/Cox; the threshold-voltage equation; Qinv = −Cox(Vg − Vt); gate-body pairing; electrical oxide thickness.
- Chapter 6: MOS Transistor, Modern Semiconductor Devices for Integrated CircuitsEarly FET patents (Lilienfeld 1930, Heil 1935), the inversion layer as a 1–2 nm film, the body effect and its coefficient, steep retrograde body doping, implanting and annealing dopants.
- Chapter 7: MOSFETs in ICs—Scaling, Leakage, and Other Topics, Modern Semiconductor Devices for Integrated CircuitsSubthreshold current and swing, the constant-current Vt definition, three leakage paths, oxide tunneling (1.2 nm SiO₂ leaks 10³ A/cm²), high-k and metal gates, random dopant fluctuation, FinFETs.
- Lecture 5: PN Junction and MOS Electrostatics (II), PN junction in thermal equilibrium (6.012 Microelectronic Devices and Circuits)Drift balances diffusion in equilibrium; the depletion approximation; built-in potential, xn, xp, total width and peak field; the lightly doped side controls the junction; contact potentials.
- Lecture 7: PN Junction and MOS Electrostatics (IV), MOS structure under bias (6.012 Microelectronic Devices and Circuits)Boltzmann relations under bias, depletion width vs gate voltage, flat band, accumulation, the threshold computation in three steps, how Vt depends on doping and oxide, and the charge-control relation QN = −Cox(VGB − VT).
- Intrinsic Carrier ConcentrationThe accepted value of ni for silicon at 300 K is 9.65 × 10⁹ cm⁻³ (Altermatt).
- DopingGroup V atoms make n-type silicon and group III atoms make p-type; majority and minority carriers.
- Formation of a PN-JunctionElectrons and holes diffuse across the junction, exposing ion cores that set up an electric field and a built-in potential.
- Si – Silicon: Basic Parameters at 300 K5 × 10²² atoms per cm³, dielectric constant 11.7, electron affinity 4.05 eV, lattice constant 5.431 Å.
- Device Details (SKY130 primitive devices)1.8 V NMOS threshold 0.538 V (TT, W/L = 7/8) and low-Vt NMOS 0.434 V; low- and high-Vt devices differ from the standard ones only by Vt-adjust implants.
- 1940: Discovery of the p-n JunctionRussell Ohl’s silicon sample at Bell Labs; Ohl and Scaff named the n-type and p-type regions and the p-n junction.
- 1960: Metal Oxide Semiconductor (MOS) Transistor DemonstratedAtalla and Kahng at Bell Labs found that thermally grown SiO₂ markedly reduced surface states and built the first successful insulated-gate FET.
- Doping gives finFETs threshold controlFinFETs were conceived with undoped channels; setting Vt through gate work function adds process complexity; light channel doping is an option, with random dopant fluctuation about a third of variability at 6 × 10¹⁷ cm⁻³. Reports IBM and GlobalFoundries’ VLSI 2012 paper, which is not openly available.