Gate delay (propagation delay): definition

Beginner

How long a logic gate takes to change its output after its input changes. A few trillionths of a second on a modern chip.

Novice

The time from an input crossing half the supply voltage to the output crossing half the supply voltage. It is mostly the time a transistor needs to charge or discharge the capacitance the gate drives.

Expert

Measured 50% to 50% and characterized per cell, per input slew and per output load in the library’s timing tables. To first order $t_{\mathrm{pd}} \approx C_{\mathrm{L}} V_{\mathrm{DD}} / (2 I_{\mathrm{on}})$ ; the slowest chain of gates between two flip-flops sets the clock period.