Glossary

Critical path

Beginner

The slowest route a signal takes through the circuit. It sets how fast the whole chip can run.

Novice

The timing path with the least slack, usually from one flip-flop through a long chain of gates to the next. Its delay sets the fastest clock the design can use.

Expert

The path with the worst slack in a path group. Optimization spends most of its effort there and recovers area everywhere else. Fixing one usually exposes the next-worst, so look at how many paths fail and by how much, not only at the worst one.

Explained in Logic synthesis (Design Flow).

See also: Slack.

All 896 terms →