SPEF
Beginner
The file that lists the drag on every wire, so the timing tool can use it.
Novice
Standard Parasitic Exchange Format: a text file listing, for every wire in the design, its resistance and capacitance. The timing tool reads it to compute real wire delays.
Expert
For each net: a resistor network between its pins, grounded capacitances, and coupling capacitors to named neighbor nets. One SPEF is written per RC corner. The timer must report how many nets were annotated, because a net missing from the SPEF silently falls back to an estimate.