Parasitic (RC) extraction
Beginner
Measuring the hidden drag on every wire in the finished drawing. The drag slows signals down.
Novice
Calculating, from the shapes of the finished wiring, how much resistance each wire has (how much it resists current) and how much capacitance (how much charge it must be filled with to switch), including the capacitance between neighboring wires. These unwanted but unavoidable properties are the “parasitics” that slow signals down.
Expert
Computing each routed net’s resistor network, capacitance to ground and coupling capacitance to neighbors from the layout and a calibrated technology file, once per interconnect corner. Full-chip extractors look up pre-characterized wire configurations rather than solving the physics directly; the result is written as SPEF for timing.