NOR gate

Beginner

A gate whose output is 1 only when all of its inputs are 0. It means “not OR.”

Novice

NOT-OR. In CMOS, an n-input NOR has n NMOS in parallel to ground and n PMOS in series to the supply. The output rises only when every input is low.

Expert

Parallel NMOS, series PMOS stack. Logical effort $(2n+1)/3$ and parasitic delay $\approx n$ . The series PMOS stack makes it slower and larger than a NAND of the same fan-in when PMOS is the weaker device.

Explained in CMOS logic (Transistors).