Forksheet
Beginner
A variation of the stacked-ribbon transistor where a thin wall lets the two kinds of transistor sit closer together.
Novice
A nanosheet layout in which the nMOS and pMOS sheets sit on either side of a thin insulating wall, so they can be packed closer together than separate nanosheet devices.
Expert
A dielectric wall between n and p nanosheet stacks shrinks n-p spacing in the cell, which lets the sheets be wider or the cell shorter. imec proposed it to extend the nanosheet roadmap (to around its A10 node) before CFET takes over.
Explained in Shrinking (Transistors).
See also: Gate-all-around (GAA) nanosheet, CFET (complementary FET).