DTCO (design-technology co-optimization)
Beginner
Designing the factory process and the circuit building blocks together, so each choice helps the other.
Novice
Choosing process rules (pitches, fin counts, metal layers) by laying out real cells and memories and measuring the result, instead of shrinking every dimension and hoping the cells still fit.
Expert
Iterating process assumptions against standard-cell, SRAM and routing results: fin-to-metal gear ratio, track height, diffusion breaks, contact schemes. ASAP7’s rules came from DTCO on a 7.5-track cell and SRAM bitcells. Much of each ‘node’s’ density gain now comes from DTCO, not from a smaller gate.
Explained in Shrinking (Transistors).
See also: Contacted poly pitch (CPP, gate pitch), Metal pitch.