Glossary

ATPG (automatic test pattern generation)

Beginner

Software that works out which test patterns to feed the chip, so that as many pretend flaws as possible would show up.

Novice

Software that works out input patterns that make a list of modeled faults visible at the outputs. With scan, it can treat every flip-flop as an extra input and output, which turns a hard problem into a much easier one.

Expert

Random patterns first for easy faults, then a deterministic search (PODEM- or FAN-style, or SAT-based) per remaining fault, with fault simulation to drop faults already detected and compaction to shrink the set. Outputs the patterns plus a class for every fault: detected, undetectable, ATPG-untestable, aborted.

Explained in Design for test (Design Flow).

See also: Fault simulation, PODEM.

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