Glossary

Vectorless analysis

Beginner

A way to find the worst sag without running real programs on the chip, by guessing how busy each part could get.

Novice

A way of estimating the worst supply dip without simulating the chip running real work: instead of a recording of every signal, it assumes how often each part of the chip switches.

Expert

Dynamic IR analysis whose currents come from assumed switching activity or from limits on each block’s current, instead of from a simulation waveform file (VCD). Fast and available early, but only as good as its assumptions, and bounding methods tend to be pessimistic. Paired with waveform-based runs on the stress patterns that matter.

Explained in Power planning (Design Flow).

See also: IR drop.

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