Register-transfer level (RTL)
Beginner
A way of describing a chip as places that store values and the rules for computing the next values, updated every tick of a clock.
Novice
A way of describing a digital circuit as storage slots (registers) plus the calculations between them. On every tick of the clock, every register takes in a newly computed value. Engineers write RTL as code, and a synthesis tool turns it into logic gates.
Expert
The level at which most chip logic is written by hand. It fixes what every register holds after every clock tick, but not which gates compute it or where they sit. Synthesis and the later stages may restructure the gates freely, as long as that cycle-by-cycle behavior is preserved.
Explained in RTL design (Design Flow).
See also: Hardware description language (HDL), Flip-flop (register), Logic synthesis.