Glossary

Propagated clock

Beginner

The clock as it really behaves after the tree is built, with real travel delays.

Novice

A clock whose arrival time at each flip-flop is calculated from the real delays of the buffers and wires in the built network, instead of being assumed.

Expert

Switched on with set_propagated_clock. Each sink then has its own latency and edge rate, variation derates apply to clock cells, and common-path credit (CPPR) becomes meaningful. All timing work after CTS, including signoff, uses propagated clocks.

Explained in Clock tree synthesis (Design Flow).

See also: Ideal clock, CPPR / CRPR.

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