Performance model
Beginner
A computer program or math that predicts how fast a chip will be before it is built.
Novice
Any model that predicts a chip’s speed before it is built: formulas in a spreadsheet, simulators such as gem5 that run real programs on a software imitation of the chip, transaction-level models in SystemC, and later the hardware description itself, simulated or loaded onto an FPGA (a reprogrammable chip).
Expert
A ladder trading speed for fidelity. Formulas prune the design space, simulators rank the survivors on real workloads, and RTL measurements calibrate the simulators. Until it is calibrated, a model’s output is a hypothesis; track its error against RTL as blocks arrive.