Transaction-level model (TLM)
Beginner
A fast, simplified model of a chip that counts messages between blocks instead of individual wires.
Novice
A software model of a chip, usually in SystemC, where blocks exchange whole operations (a read, a write, a packet) instead of individual wire changes on every clock tick. It runs fast enough to boot real software before the chip exists.
Expert
SystemC’s TLM-2.0 interfaces support two styles: loosely timed, for speed, and approximately timed, for more accurate performance numbers. Accuracy is traded for speed, so performance conclusions from a TLM need checking against the real design or silicon.