Packing (clustering)
Beginner
Grouping small parts that work together into one bigger block on the FPGA, so the wires between them stay short.
Novice
The FPGA step between technology mapping and placement. It groups lookup tables and flip-flops into the chip’s logic blocks, within each block’s limits on inputs, clocks and size. Connections inside a block use fast local wiring instead of the general routing.
Expert
Clustering basic logic elements into logic-block sites under legality constraints (input pins, control signals, carry chains). Classic tools seed a cluster and greedily absorb the element with the most shared nets, weighted by timing criticality (VPack, T-VPack).
Explained in From hardware code to bitstream (Architectures).
See also: K-feasible cut, VPR (Versatile Place and Route).