Open-source FPGA toolchain
Beginner
A set of free programs that take FPGA code all the way to the finished settings file, without the chip maker’s software.
Novice
A chain of open-source tools that goes from hardware code to a bitstream with no vendor software: usually Yosys for synthesis, nextpnr for place and route, and a bit packer built on an open documentation project such as IceStorm or Trellis.
Expert
A free HDL-to-bitstream flow for commercial devices. It depends on reverse-engineered device data (routing graph, timing, bit mapping): Yosys + nextpnr + IceStorm, Trellis, Oxide or Apicula, or F4PGA with VPR or nextpnr.
Explained in From hardware code to bitstream (Architectures).
See also: Yosys, nextpnr, Bitstream generation.