Inverter (NOT gate)
Beginner
The simplest logic gate: it outputs the opposite of its input.
Novice
A gate whose output is 1 when the input is 0 and 0 when the input is 1. In CMOS it is one PMOS from the supply to the output and one NMOS from the output to ground, with both gates tied to the input.
Expert
One PMOS, one NMOS, gates common. The reference gate for delay (FO4) and logical effort (), and the building block of buffers, latches and SRAM cells. Its DC transfer curve defines switching threshold and noise margins.
Explained in CMOS logic (Transistors).
See also: Voltage transfer curve (VTC), FO4 delay.