Hierarchical design (partitioning)
Beginner
Splitting a huge chip into big pieces that different teams finish on their own, then fitting the pieces together.
Novice
Splitting a large chip into blocks that are laid out separately, often by different teams, each with its own outline, pins and timing targets, and then assembling them at the top level.
Expert
Top-down planning sets block outlines, pin positions and timing budgets from a full-chip view; bottom-up assembly integrates finished blocks. Styles range from channeled (top-level wiring and buffers in channels between blocks) to abutted (no channels). Fixed-outline floorplanning is the matching optimization problem.
Explained in Floorplanning (Design Flow).
See also: Timing budget, Abutted floorplan, Pin assignment.