Combinational logic
Beginner
Circuitry whose output depends only on its inputs right now, with no memory.
Novice
Logic with no memory: its output depends only on its inputs at that moment. Adders, comparators and multiplexers (circuits that pick one of several inputs) are examples. In SystemVerilog it is written with always_comb or assign.
Expert
Everything between flip-flops. Signals take time to ripple through it, and the slowest path between two flops sets the shortest usable clock period. How the RTL is written (chains of if/else, operator order, bit widths) shapes what synthesis can build from it.