Clock domain
Beginner
A group of parts on a chip that all march to the same clock beat.
Novice
All the flip-flops (one-bit storage elements that update on each tick of a clock signal) driven by the same clock, or by clocks locked in a fixed relationship. Separate domains let blocks run at different speeds or stop independently.
Expert
Each unrelated (asynchronous) domain needs its own clock network and timing constraints, and every signal that crosses between unrelated domains needs a synchronizer, a handshake or an asynchronous FIFO. The domain plan is set at architecture and drives clock-tree and crossing checks later.
Explained in Architecture (Design Flow).
See also: Clock domain crossing (CDC), Power domain.