Glossary

Clock domain crossing (CDC)

Beginner

A signal passing between parts of the chip that run on different clocks, which needs special care so it isn’t misread.

Novice

A signal sent from a flip-flop in one clock domain to one in another, unrelated domain. The receiving flip-flop can catch the signal mid-change and hang between 0 and 1 for a while (metastability), so crossings need a synchronizer circuit.

Expert

Single bits pass through two flip-flops in a row as a synchronizer; multi-bit values use handshakes or asynchronous FIFOs with Gray-coded pointers. Crossings are checked with dedicated structural and formal CDC tools, because RTL simulation and static timing analysis don’t catch these bugs.

Explained in Architecture (Design Flow).

See also: Clock domain.

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