Cache miss (and hit rate)
Beginner
When the cache doesn’t have what the core asked for, so it must be fetched from slower memory. The hit rate is how often it does have it.
Novice
A miss is an access the cache cannot answer; the line is fetched from the next level. The hit rate is hits ÷ accesses, and the miss rate is one minus that. Misses are sorted into compulsory, capacity and conflict (the three Cs).
Expert
Local miss rate counts misses per access to that cache; global miss rate per CPU access; misses per kilo-instruction (MPKI) normalizes by work. Out-of-order cores overlap misses, so stall time depends on memory-level parallelism, not just count.
Explained in Caches and coherence (Architectures).
See also: 3Cs (compulsory, capacity, conflict misses), AMAT (average memory access time).