Boundary scan (IEEE 1149.1, JTAG)
Beginner
A small, standard test plug on a chip. It is used to check that every pin is soldered properly to the circuit board.
Novice
A standard, IEEE 1149.1, usually called JTAG. It puts a small test cell behind every pin and adds a four- or five-pin test port, so a board tester can set and read every pin of every chip one bit at a time and check the board’s wiring.
Expert
A 16-state TAP controller, an instruction register of at least 2 bits, a 1-bit bypass register and an optional 32-bit IDCODE. EXTEST, SAMPLE, PRELOAD and BYPASS are mandatory; INTEST and RUNBIST are optional. The pin map is published in BSDL.