Bit line
Beginner
The wire that carries a bit into or out of a memory cell. Every cell in a column shares it.
Novice
A vertical wire shared by every cell in one column of a memory array. Data is written by driving it and read by sensing small changes on it. SRAM uses a pair per column (BL and its complement BLB); DRAM uses a single bit line per column, shared by hundreds of cells.
Expert
A heavily loaded line: each attached cell adds junction and wire capacitance, so bit-line capacitance grows with cells per column and dominates read delay and energy. Designs trade cells per bit line (density) against swing, speed and sense-amplifier count.
Explained in Memory cells (Transistors).
See also: Word line, Sense amplifier, Precharge.