Vector (SIMD) extension
Beginner
Extra instructions that let a core do the same math on a whole row of numbers in one step.
Novice
A set of instructions added to a processor’s instruction set that work on short vectors of numbers held in wide registers: SSE, AVX and AVX-512 on x86, NEON and SVE on Arm, and the V extension on RISC-V.
Expert
Fixed-width families (SSE 128, AVX 256, AVX-512 512 bits; NEON 128) bake the register width into the code; scalable ones (SVE, RVV) leave it to the implementation and expose it at run time. Masks or predicates handle conditionals and loop tails.
Explained in Multicore and vector units (Architectures).
See also: SIMD (single instruction, multiple data), Vector-length agnostic.