UCIe
Beginner
A shared set of rules that lets small chips from different makers talk to each other inside one package.
Novice
Universal Chiplet Interconnect Express, an open standard for the links between chiplets in one package. It defines the electrical signals, the bump layout and the protocols, so chiplets from different designers can work together.
Expert
Defines a standard-package PHY (100–130 µm bump pitch, up to 25 mm reach) and an advanced-package PHY (25–55 µm, up to 2 mm) with spare lanes for repair, plus mappings for PCIe and CXL traffic.
Explained in AI accelerators and datacenter (Industries).