Glossary

Test compression

Beginner

Squeezing test patterns so the test machine sends far less data and the test runs faster.

Novice

On-chip hardware that expands a few streams of test data from the tester into many short internal scan chains, and squeezes the many chain outputs back into a few. It works because only a small share of the bits in each pattern actually matter.

Expert

A linear decompressor (an LFSR-like circuit fed continuously from the tester) is driven with data found by solving linear equations so that it reproduces the bits that matter. The output compactor, usually XOR-based, needs masking or X-tolerance because unknown values spoil the compacted result.

Explained in Design for test (Design Flow).

See also: LFSR, MISR.

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