Power wall
Beginner
The limit on how much heat a chip can give off. Around 2005 it stopped chips from simply running their clocks faster.
Novice
The point where a chip’s power, and so its heat, became the limit on its speed. Once supply voltage stopped falling with each new manufacturing generation, faster clocks meant more heat than packages could remove, so clock rates flattened in the mid-2000s.
Expert
With V roughly fixed, P ≈ αCV²f per gate stops falling as fast as gate density rises, and in the DVFS range f ∝ V makes per-core power grow roughly as f³. Designs became power-limited (TDP-bound) rather than area-limited.
Explained in Multicore and vector units (Architectures).
See also: Dennard scaling, Dark silicon, TDP (thermal design power).