Glossary

Partial reconfiguration

Beginner

Changing the design in one part of an FPGA while the rest keeps running.

Novice

Loading a partial bitstream that rewrites only one region of the FPGA, while the rest of the design keeps working. AMD calls it Dynamic Function eXchange.

Expert

Rewriting the configuration frames of a reconfigurable region while the static logic keeps running. Frames are the smallest unit of configuration, so regions are made of whole frames.

Explained in Lookup tables and the FPGA fabric (Architectures).

See also: Bitstream.

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