Memory semantics
Beginner
One chip can read or write another chip’s memory directly, as if it were its own. It doesn’t have to pack data into messages.
Novice
A fabric property: accelerators issue ordinary loads, stores and atomic operations to addresses that live on another accelerator. Hardware turns them into read, write and atomic requests across the link.
Expert
Load/store/atomic transactions with a defined ordering model, carried as small requests (64–256 B) rather than NIC-driven messages. Enables one-sided, PGAS-style communication and fine-grained synchronization, but requires many outstanding requests to fill the link and careful handling of ordering and errors.