Logic depth
Beginner
How many building blocks a signal passes through, one after another, from input to output.
Novice
The number of gates a signal passes through, one after another, on the longest route from input to output. It is a first rough estimate of delay.
Expert
Levels of logic on a path, counted in AIG nodes or mapped cells. It tracks delay only loosely, since real delay depends on cell type, load, input transition and wires, but it is what balancing and depth-oriented mapping minimize.
Explained in Logic synthesis (Design Flow).