IPC (instructions per cycle)
Beginner
How many commands a chip finishes on each tick of its clock, on average.
Novice
The average number of instructions completed per clock cycle, the inverse of CPI. A simple pipeline reaches at most 1; chips that work on several instructions at once can exceed it.
Expert
. Superscalar out-of-order cores sustain IPC above 1 on code with enough independent instructions; misses and mispredictions pull it down.
Explained in Instructions and pipelines (Architectures).
See also: CPI (cycles per instruction), Iron law of processor performance.