Functional coverage
Beginner
A checklist of situations the tests should reach. Each one gets ticked off when a test actually reaches it.
Novice
A list of situations that the specification cares about, written by engineers, which the simulator ticks off as tests reach them; for example, “the buffer is full when a reset arrives.” The total shows how much of the plan the tests have actually exercised.
Expert
Written as SystemVerilog covergroups (coverpoints that sort values into bins, and crosses that combine coverpoints) or as cover properties. Only as good as the list: a feature missing from it reads 100% while untested. Crosses multiply bin counts, so engineers choose them from the spec’s risky areas.