Crossbar array (for computing)
Beginner
A grid of wires with a memory cell where each pair crosses. Signals go in along the rows. They come out of the columns already multiplied and added up.
Novice
Rows and columns of wires with a programmable resistor or memory cell at each crossing. Voltages on the rows times the cells’ conductances give currents (Ohm’s law), and each column wire adds them up (Kirchhoff’s law): a matrix-vector multiply in one step.
Expert
Array size is bounded by IR drop, wire capacitance, sneak paths (hence 1T1R cells with a selector transistor) and the ADC’s dynamic range. Signed weights use a differential pair, . Not to be confused with an interconnect crossbar switch.
Explained in Sparsity, in-memory and analog compute (Architectures).
See also: Compute-in-memory (CIM).