Clock gating
Beginner
Pausing parts of the chip that have nothing to do, like turning off the lights in empty rooms.
Novice
Stopping the clock signal to a group of flip-flops whenever they would just keep their current value. With no clock ticks they don’t switch, which saves power.
Expert
Synthesis replaces the feedback multiplexers of flip-flops that share an enable with one integrated clock-gating (ICG) cell, which contains a latch so the gated clock can’t glitch. Teams set a minimum group size, check that the enable reaches the ICG in time, and connect the ICG’s test-enable pin for scan testing.
Explained in Logic synthesis (Design Flow).