<?xml version="1.0" encoding="UTF-8"?>
<urlset xmlns="http://www.sitemaps.org/schemas/sitemap/0.9">
<url>
<loc>https://www.chipfieldguide.com/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/software/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/extras/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/extras/industries/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/about/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/legal/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/transistors/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/transistors/switch/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/transistors/cmos-logic/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/transistors/iv-curve/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/transistors/speed-power/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/transistors/scaling/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/transistors/fabrication/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/transistors/memory-cells/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/transistors/cell-library/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/transistors/physics/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/transistors/topologies/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/design/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/design/spec/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/design/architecture/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/design/rtl/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/design/verification/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/design/synthesis/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/design/dft/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/design/floorplan/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/design/power-planning/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/design/placement/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/design/cts/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/design/routing/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/design/signoff/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/design/tapeout/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/architectures/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/architectures/cpu-pipelines/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/architectures/out-of-order/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/architectures/caches/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/architectures/multicore/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/architectures/gpus/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/architectures/workloads/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/architectures/number-formats/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/architectures/systolic-arrays/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/architectures/dataflow/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/architectures/wafer-scale/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/architectures/memory-wall/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/architectures/alternative-compute/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/architectures/comparing/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/architectures/fpga-fabric/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/architectures/fpga-flow/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/architectures/fpga-uses/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/systems/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/systems/packaging/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/systems/server/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/systems/scale-up/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/systems/scale-out/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/systems/optics/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/systems/parallelism/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/systems/power-cooling/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/extras/tools/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/extras/ai-in-eda/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/extras/after-tapeout/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/extras/industries/ai/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/extras/industries/edge/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/extras/industries/automotive/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/extras/industries/medical/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/extras/industries/space/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/extras/industries/defense/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/extras/industries/fintech/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/transistor/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/mosfet/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/mos-gate/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/source-drain/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/mos-body/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/gate-oxide/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/doping/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/nmos/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pmos/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cmos/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/inversion-channel/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/on-resistance/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/gate-capacitance/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/subthreshold-swing/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/body-effect/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/sky130/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/logic-gate/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/truth-table/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/inverter/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pull-up-network/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pull-down-network/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/nand-gate/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/nor-gate/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/complex-gate/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/voltage-transfer-curve/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/switching-threshold/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/noise-margin/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/restoring-logic/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/carrier-mobility/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/skewed-gate/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/transistor-stack/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/fan-in/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/logical-effort/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/short-circuit-current/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/drain-current/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cutoff-region/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/linear-region/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/saturation-region/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pinch-off/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/square-law-model/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/overdrive-voltage/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/velocity-saturation/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/alpha-power-law/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/channel-length-modulation/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/output-resistance/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/dibl/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/subthreshold-conduction/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/on-current/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/off-current/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/transconductance/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/compact-model/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/gate-delay/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/load-capacitance/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/gate-leakage/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/minimum-energy-point/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/power-density/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/gate-length/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/short-channel-effects/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/natural-length/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/finfet/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/gate-all-around/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/forksheet/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cfet/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/contacted-poly-pitch/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/metal-pitch/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/eot/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/high-k-metal-gate/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/soi/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/dtco/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/wafer/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/photoresist/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ion-implantation/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/thin-film-deposition/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ald/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/plasma-etch/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/sti/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/well/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/self-aligned-gate/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/sidewall-spacer/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/silicide/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/damascene/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/mol/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/immersion-lithography/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/critical-dimension/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/spc/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/defect-clustering/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/sram/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/bitcell/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/word-line/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/bit-line/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/precharge/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/sense-amplifier/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cell-ratio/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pull-up-ratio/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/static-noise-margin/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/butterfly-curve/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/write-margin/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/vt-mismatch/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/charge-sharing/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/dram-refresh/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/volatile-memory/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/flash-memory/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/floating-gate/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/multi-level-cell/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/row-hammer/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cell-characterization/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/drive-strength/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/transition-time/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/bilinear-interpolation/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/track-height/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/spice/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/timing-arc/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ccs-model/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/semiconductor/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/band-gap/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/conduction-band/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/valence-band/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/hole/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/n-type/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/p-type/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/majority-carrier/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/fermi-level/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/intrinsic-carrier-concentration/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/depletion-region/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/p-n-junction/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/built-in-potential/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/mos-capacitor/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/flat-band-voltage/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/inversion-layer/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/work-function/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/random-dopant-fluctuation/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/planar-transistor/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/multigate-transistor/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/effective-width/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/nanowire/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/superlattice/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/inner-spacer/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/channel-release/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/replacement-metal-gate/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/self-heating/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/specification/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/prd/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/architecture-spec/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/microarchitecture-spec/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/requirement/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/traceability/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/verification-plan/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/tdp/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/power-budget/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/uncore/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/dies-per-wafer/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/die-yield/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/defect-density/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cost-per-good-die/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/process-node/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/mask-set/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/phy/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/compliance-testing/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/executable-spec/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/tlm/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/dynamic-power/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/leakage-power/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/activity-factor/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/threshold-voltage/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/dennard-scaling/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/dark-silicon/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/test-coverage/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/threat-model/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/spec-freeze/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/chip-package/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/microarchitecture/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/accelerator/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/memory-hierarchy/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cache/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/scratchpad-memory/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/dram/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/amat/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/three-cs/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/bus-interconnect/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/crossbar/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/network-on-chip/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cache-coherence/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pipelining/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cpi/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pipeline-hazard/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/branch-prediction/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/amdahls-law/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/gustafsons-law/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/roofline-model/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/arithmetic-intensity/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/clock-domain/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/clock-domain-crossing/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/power-domain/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/performance-model/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/hw-sw-codesign/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ip-block/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/fo4/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/littles-law/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/rtl/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/hdl/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/synthesizable-subset/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/clock/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/flip-flop/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/combinational-logic/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/logic-synthesis/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/blocking-assignment/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/nonblocking-assignment/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/inferred-latch/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/fsm/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/metastability/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/synchronizer/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/mtbf/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/async-fifo/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/gray-code/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/reset-synchronizer/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/reset-domain-crossing/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/lint/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/high-level-synthesis/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/event-driven-simulation/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cycle-based-simulation/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/simulation/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/testbench/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/design-under-test/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/reference-model/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/scoreboard/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/directed-test/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/constrained-random/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/uvm/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cocotb/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/assertion/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/functional-coverage/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/code-coverage/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/coverage-closure/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/formal-verification/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/counterexample/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/model-checking/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/bounded-model-checking/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/k-induction/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ic3-pdr/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/bdd/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/sat-solver/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/emulation/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/fpga-prototyping/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/gate-level-simulation/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/power-aware-simulation/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/regression/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/x-propagation/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/netlist/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/standard-cell/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/liberty/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/elaboration/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/technology-mapping/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/sdc/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/slack/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/critical-path/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ppa/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/retiming/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/clock-gating/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/resource-sharing/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/one-hot/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/wire-load-model/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/equivalence-checking/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/aig/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/nldm/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/multibit-flop/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/false-path/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/multicycle-path/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/sum-of-products/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/logic-depth/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/timing-path/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/multiplexer/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/dft/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/manufacturing-defect/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/yield/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/test-escape/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/test-pattern/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/fault-model/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/stuck-at-fault/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/transition-fault/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/path-delay-fault/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/bridging-fault/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cell-aware-test/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/fault-coverage/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/fault-collapsing/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/untestable-fault/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/controllability-observability/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/scan-flop/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/scan-chain/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/scan-enable/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/shift-and-capture/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/lockup-latch/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/at-speed-test/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/launch-on-capture/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/launch-on-shift/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/atpg/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/test-compression/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/mbist/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/march-test/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/lfsr/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/misr/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/signature-aliasing/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/boundary-scan/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ijtag/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ate/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/wafer-sort/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/final-test/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/burn-in/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/fault-simulation/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/d-algorithm/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/podem/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/fan-algorithm/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/scan-diagnosis/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/random-pattern-resistant/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/x-value/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/floorplan/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/die-core/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/aspect-ratio/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/macro/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pll/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/io-ring/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pad-limited/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/flip-chip/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pin-assignment/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/macro-channel/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/voltage-area/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/level-shifter/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/hierarchical-design/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/timing-budget/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/abutment/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/lef/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/def/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/slicing-floorplan/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/sequence-pair/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/mixed-size-placement/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/trial-placement/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pdn/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/vdd-vss/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ir-drop/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/power-ring/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/power-strap/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/power-rail/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/via-array/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/decap-cell/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/power-switch/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/rush-current/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/vectorless-analysis/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/target-impedance/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ldi-dt/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/placement-row/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/hpwl/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/utilization/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/congestion/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/global-placement/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/legalization/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/detailed-placement/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/timing-driven-placement/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/placement-blockage/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/halo/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/fence-region/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/tap-cell/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/endcap-cell/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/spare-cell/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/scan-reordering/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/simulated-annealing/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/electrostatic-placement/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/rudy/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/density-overflow/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pin-access/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/buffer/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/clock-tree-synthesis/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/clock-sink/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/clock-skew/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/clock-latency/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/clock-slew/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/clock-to-q/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/setup-time/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/hold-time/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ideal-clock/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/propagated-clock/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/useful-skew/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/clock-buffer/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/h-tree/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/clock-mesh/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/non-default-rule/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/clock-uncertainty/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ocv/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cppr/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/elmore-delay/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/skew-group/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/net/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/metal-stack/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/preferred-direction/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/routing-track/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/via/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/gcell/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/global-routing/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/route-guide/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/track-assignment/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/detailed-routing/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/routing-overflow/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/coupling-capacitance/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/redundant-via/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/multiple-patterning/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/maze-routing/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/steiner-tree/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/rip-up-and-reroute/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/negotiated-congestion/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/signoff/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/static-timing-analysis/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/parasitic-extraction/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/spef/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pvt-corner/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/rc-corner/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/mcmm/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/recovery-removal/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/aocv/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pocv/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ssta/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/crosstalk/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/gba-pba/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/rule-deck/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/drc/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/lvs/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/erc/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/antenna-effect/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/metal-fill/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/electromigration/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/waiver/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/eco/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/tapeout/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/foundry/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/gdsii/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/oasis/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/layout-abstract/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/layer-datatype/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/layer-map/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cmp/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/density-window/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/slotting/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/photomask/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/reticle/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/mask-data-prep/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/opc/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ilt/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/mpw/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/respin/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cpu/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/instruction-set-architecture/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/risc/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/risc-v/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/program-counter/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/forwarding/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/load-use-hazard/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ipc/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/iron-law/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/out-of-order-execution/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/superscalar/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/register-renaming/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/reorder-buffer/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/reservation-station/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/speculative-execution/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/branch-target-buffer/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/return-address-stack/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/misprediction-penalty/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/instruction-window/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/precise-exception/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/spectre/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cache-line/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/locality/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cache-miss/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/set-associative/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/replacement-policy/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/write-back/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/prefetching/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/virtual-memory/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/tlb/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/mesi/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/snooping/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/false-sharing/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/memory-consistency/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/multicore/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/power-wall/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ilp-wall/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/hardware-thread/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/simultaneous-multithreading/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/last-level-cache/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/vector-extension/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/vector-length-agnostic/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/heterogeneous-cores/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/boost-clock/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/lut/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/logic-block/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/carry-chain/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/switch-box/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/routing-fabric/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/bitstream/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/block-ram/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/dsp-block/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/hard-ip/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/configuration-memory/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/partial-reconfiguration/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cpld/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/yosys/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/packing/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/k-feasible-cut/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/nextpnr/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/vpr/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/timing-closure/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/open-fpga-toolchain/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/bitstream-generation/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/integrated-logic-analyzer/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/fpga-asic-gap/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/break-even-volume/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/smartnic/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/adaptive-soc/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/efpga/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/structured-asic/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/field-upgrade/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/neural-network/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/weights/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/gemm/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/flop/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/memory-bandwidth/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/compute-bound/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/memory-bound/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ridge-point/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/transformer/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/attention/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/token/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/kv-cache/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/prefill/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/decode/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/batching/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/training/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/inference/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/elementwise-op/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/kernel-fusion/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/convolution/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/floating-point/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/mantissa/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/fp-exponent/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/dynamic-range/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/subnormal/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/round-to-nearest-even/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/tensor/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/bf16/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/fp16/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/fp8/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/mixed-precision/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/loss-scaling/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/quantization/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/scale-factor/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/integer-quantization/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/outlier-features/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/microscaling/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/fp4/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/accumulator/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/swamping/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/stochastic-rounding/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/sqnr/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/gpu/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/simt/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/simd/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/warp/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/streaming-multiprocessor/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/gpu-kernel/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/thread-block/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/warp-scheduler/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/latency-hiding/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/occupancy/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/branch-divergence/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/register-file/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/register-spilling/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/shared-memory/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/memory-coalescing/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/tensor-core/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cuda/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/processing-element/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/activation/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/partial-sum/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/weight-stationary/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/output-stationary/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/row-stationary/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/operand-reuse/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/input-skew/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/fill-drain/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pe-utilization/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/tiling/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/im2col/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/batch/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/spatial-architecture/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/mesh-topology/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/noc-router/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/xy-routing/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/channel-load/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/dataflow-mapping/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/layer-pipelining/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/operator-fusion/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cgra/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/flow-control/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/deadlock/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/bsp/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/wafer-scale-integration/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/die/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/scribe-line/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/spare-core/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/model-parameter/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/deterministic-execution/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/weight-streaming/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/serdes/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cold-plate/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ldo/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cte-mismatch/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pipeline-parallelism/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/memory-wall/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/continuous-batching/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/grouped-query-attention/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/speculative-decoding/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/sparsity/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pruning/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/structured-sparsity/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/sparse-format/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/compute-in-memory/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/crossbar-array/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/rram/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/phase-change-memory/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/adc/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/dac/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/analog-compute/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/enob/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/conductance-drift/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/noise-aware-training/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/tops-per-watt/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/peak-throughput/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/compute-utilization/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/mfu/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/mlperf/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/mlperf-division/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/mlperf-category/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/mlperf-scenario/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/time-to-train/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/tail-latency/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/perf-per-watt/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pue/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/tco/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/capex-opex/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/bump-pitch/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/microbump/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/silicon-bridge/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/shoreline/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/die-to-die-link/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/bandwidth-density/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/energy-per-bit/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/hbm-base-die/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/die-stacking/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/heterogeneous-integration/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/host-cpu/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ai-accelerator/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pcie/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pcie-lane/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/link-width/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/root-complex/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pcie-switch/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/oversubscription/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/retimer/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/flit/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/nvme/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/nic/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cxl/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cxl-type3/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/numa/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/bounce-buffer/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/vrm/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/point-of-load/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/multiphase-buck/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/busbar/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/psu-redundancy/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/bmc/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/redfish/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/oam/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ocp/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/scale-up-domain/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/scale-out-network/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/tensor-parallelism/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/collective-operation/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/all-reduce/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/reduce-scatter/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/all-gather/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/all-to-all/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/network-topology/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/full-mesh/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/torus/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/network-switch/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/bisection-bandwidth/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/memory-semantics/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/alpha-beta-model/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/in-network-reduction/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/link-level-retry/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/switch-radix/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/leaf-spine/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/clos-network/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/fat-tree/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/rail-optimized/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/rdma/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/infiniband/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/roce/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pfc/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/credit-based-flow-control/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/head-of-line-blocking/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/incast/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ecn/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/dcqcn/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ecmp/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/elephant-flow/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/packet-spraying/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/adaptive-routing/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ultra-ethernet/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/lane/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pam4/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/nrz/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/insertion-loss/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/nyquist-frequency/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/skin-effect/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/equalization/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/direct-attach-copper/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/active-electrical-cable/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pluggable-optics/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/optical-dsp/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/tia/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/lpo/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cpo/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/optical-engine/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/silicon-photonics/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/external-laser-source/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/fec/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/failure-domain/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/training-step/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/gradient/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/optimizer-state/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/activations/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/activation-recomputation/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/data-parallelism/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/mixture-of-experts/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/expert-parallelism/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/sequence-parallelism/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/context-parallelism/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/collective-communication/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/zero-sharding/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/microbatch/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pipeline-bubble/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/rack-power-density/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/power-conversion-chain/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/distribution-transformer/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ups/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pdu/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/psu/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/itue/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/tue/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/direct-to-chip-cooling/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/rear-door-heat-exchanger/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/immersion-cooling/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cdu/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/economizer/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/chiller/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/wue/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/systolic-array/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/mac/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/reticle-limit/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/chiplet/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/silicon-interposer/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/hbm/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/hybrid-bonding/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ucie/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/backside-power/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/known-good-die/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/power-gating/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/dvfs/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/multi-vt/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/always-on-domain/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/upf/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/isolation-cell/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/retention-flop/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/near-threshold/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/npu/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/secure-enclave/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/side-channel/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/soc/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/functional-safety/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/asil/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/safety-mechanism/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/spfm/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/lfm/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pmhf/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/fmeda/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/lockstep/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/safety-island/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/fault-injection/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/lbist/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/aec-q100/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/dppm/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/tara/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/implantable/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/fda-device-class/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pma/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/hde/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/essential-performance/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/analog-front-end/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/medradio/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/hermetic-package/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/biocompatibility/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/total-ionizing-dose/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/single-event-effect/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/seu/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/set/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/sel/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/sefi/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/rhbd/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/tmr/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/dice/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/edac/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/scrubbing/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/qml/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/cots/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/trusted-foundry/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/trusted-supplier/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/itar/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/ear/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/deemed-export/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/hardware-trojan/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/counterfeit-part/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/split-manufacturing/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/logic-locking/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/dmsms/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/fpga/</loc>
</url>
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<loc>https://www.chipfieldguide.com/glossary/asic/</loc>
</url>
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<loc>https://www.chipfieldguide.com/glossary/tick-to-trade/</loc>
</url>
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<loc>https://www.chipfieldguide.com/glossary/order-book/</loc>
</url>
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<loc>https://www.chipfieldguide.com/glossary/deterministic-latency/</loc>
</url>
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<loc>https://www.chipfieldguide.com/glossary/ptp/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/secure-element/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/hsm/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/common-criteria/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/nre/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/eda/</loc>
</url>
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<loc>https://www.chipfieldguide.com/glossary/pdk/</loc>
</url>
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</url>
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</url>
<url>
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</url>
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<loc>https://www.chipfieldguide.com/glossary/golden-tool/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/eda-license/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/design-database/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/machine-learning/</loc>
</url>
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<loc>https://www.chipfieldguide.com/glossary/large-language-model/</loc>
</url>
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<loc>https://www.chipfieldguide.com/glossary/hallucination/</loc>
</url>
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</url>
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</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/design-space-exploration/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/surrogate-model/</loc>
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<url>
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</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/pareto-front/</loc>
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<loc>https://www.chipfieldguide.com/glossary/proxy-metric/</loc>
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<url>
<loc>https://www.chipfieldguide.com/glossary/data-contamination/</loc>
</url>
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</url>
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<loc>https://www.chipfieldguide.com/glossary/domain-adaptive-pretraining/</loc>
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<loc>https://www.chipfieldguide.com/glossary/llm-agent/</loc>
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</url>
<url>
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</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/rayleigh-criterion/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/feol-beol/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/metrology/</loc>
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<loc>https://www.chipfieldguide.com/glossary/overlay/</loc>
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<url>
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<url>
<loc>https://www.chipfieldguide.com/glossary/binning/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/wire-bond/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/package-substrate/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/tsv/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/first-silicon/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/silicon-bring-up/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/post-silicon-validation/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/shmoo-plot/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/characterization/</loc>
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<loc>https://www.chipfieldguide.com/glossary/errata/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/trace-buffer/</loc>
</url>
<url>
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<url>
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<url>
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<url>
<loc>https://www.chipfieldguide.com/glossary/fit-rate/</loc>
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<url>
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<url>
<loc>https://www.chipfieldguide.com/glossary/acceleration-factor/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/yield-learning/</loc>
</url>
<url>
<loc>https://www.chipfieldguide.com/glossary/physical-failure-analysis/</loc>
</url>
</urlset>
